DocumentCode
988040
Title
Crosstalk reduction in mixed-signal 3-D integrated circuits with interdevice layer ground planes
Author
Kim, Sang Kevin ; Liu, Christianto C. ; Xue, Lei ; Tiwari, Sandip
Author_Institution
Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
Volume
52
Issue
7
fYear
2005
fDate
7/1/2005 12:00:00 AM
Firstpage
1459
Lastpage
1467
Abstract
We show nearly 8 dB of crosstalk reduction using ground planes between active device layers in three-dimensional (3-D) integrated circuits. Our experimental work utilizes two planes of MOS transistors with tungsten or polysilicon ground planes designed to attenuate crosstalk. Theoretical simulations, using an electromagnetic solver, and the experimental results are consistent with analytical results. The key result verified is that a ground plane, whose footprint shadows the device area, is sufficiently large for effective attenuation. The interdevice layer ground plane provides an effective means to achieve crosstalk reduction in 3-D mixed-signal/RF integration because of simple fabrication and high coupling isolation.
Keywords
MOSFET; circuit simulation; crosstalk; integrated circuit noise; isolation technology; mixed analogue-digital integrated circuits; radiofrequency integrated circuits; silicon; tungsten; MOS transistor; crosstalk reduction; electromagnetic solver; interdevice layer ground plane; mixed-signal 3-D integrated circuit; polysilicon ground plane; tungsten ground plane; Analytical models; Attenuation; Circuit simulation; Crosstalk; Electromagnetic analysis; Fabrication; MOSFETs; Radio frequency; Three-dimensional integrated circuits; Tungsten; 3-D integration; Coupling; crosstalk; ground plane; isolation technology; mixed-signal circuits; radio frequency (RF) isolation; system-on-chip (SoC) integration; three-dimensional (3-D) ICs;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2005.850641
Filename
1459105
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