• DocumentCode
    988240
  • Title

    Evaluation of the impact of layout on device and analog circuit performance with lateral asymmetric channel MOSFETs

  • Author

    Kumar, D. Vinay ; Narasimhulu, K. ; Reddy, P.S. ; Shojaei-Baghini, M. ; Sharma, Dinesh K. ; Patil, Mahesh B. ; Rao, V. Ramgopal

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol., Mumbai, India
  • Volume
    52
  • Issue
    7
  • fYear
    2005
  • fDate
    7/1/2005 12:00:00 AM
  • Firstpage
    1603
  • Lastpage
    1609
  • Abstract
    Lateral asymmetric channel (LAC) or single halo devices have been reported to exhibit excellent short channel behavior in the sub-100-nm regime. In this paper, we have quantified the performance degradation in LAC devices due to fingered layouts. Our mixed-mode two-dimensional simulation results show that though the fingered layout of the device limits the performance of these MOSFETs, they still show superior performance over the conventional devices in the sub-100-nm channel length regime. We also present the simulation results of a two-stage operational amplifier with LAC and conventional devices using a 0.13-μm technology with the help of look-up table simulations. Our results show that for the given design specifications, an OPAMP layout with conventional devices occupies 18% more chip area compared to the LAC device.
  • Keywords
    CMOS analogue integrated circuits; MOSFET; analogue integrated circuits; circuit simulation; integrated circuit layout; table lookup; LAC devices; OPAMP layout; analog circuit performance; channel engineering; fingered lay-out; lateral asymmetric channel MOSFETs; look-up table simulations; mixed-mode 2D simulation; short channel behavior; single halo devices; sub-100-nm regime; two-stage operational amplifier; Analog circuits; Circuit optimization; Circuit simulation; Degradation; Doping profiles; Helium; Los Angeles Council; MOSFETs; Operational amplifiers; Table lookup; Analog circuit; MOSFET; channel engineering; lateral asymmetric channel (LAC); look-up table (LUT); quasi-static;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2005.850941
  • Filename
    1459125