DocumentCode :
988261
Title :
Enhancement of Data Retention Time for 512-Mb DRAMs Using High-Pressure Deuterium Annealing
Author :
Chang, Hyo Sik ; Hwang, Hyunsang
Author_Institution :
Korea Inst. of Ceramic Eng. & Technol., Icheon
Volume :
55
Issue :
12
fYear :
2008
Firstpage :
3599
Lastpage :
3601
Abstract :
We have investigated the effect of high-pressure deuterium annealing (HPDA) for retention time improvement of 512-Mb dynamic random access memories with 3D cell transistors. Compared with a control sample annealed in a conventional forming gas (4% H2/N2), additional annealing in a high-pressure deuterium ambient (100% D2) at 400degC for 30 min improved the data retention time. This improvement can be explained by the decrease of junction leakage currents due to D2 incorporation at the SiO2/Si interface near trench isolation region. In addition, HPDA introduced during postmetal anneal exhibited improved hot carrier reliability.
Keywords :
DRAM chips; deuterium; elemental semiconductors; silicon; silicon compounds; 3D cell transistors; DRAM; HPDA; SiO2-Si; data retention time; dynamic random access memories; high-pressure deuterium ambient; high-pressure deuterium annealing; hot carrier reliability; junction leakage currents; postmetal anneal; storage capacity 512 Mbit; temperature 400 degC; trench isolation region; Annealing; CMOS process; Ceramics; Deuterium; Hot carriers; Hydrogen; Leakage current; Passivation; Random access memory; Tin; Deuterium annealing; hot carrier; passivation; retention time; transistors;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2008.2006536
Filename :
4674558
Link To Document :
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