On the realization of discrete cosine transform using the distributed arithmetic

Author

Chan, Yuk-Hee ; Siu, Wan-chi

Author_Institution

Dept. of Electron. Eng., Hong Kong Polytech., Kowloon, Hong Kong

Volume

39

Issue

9

fYear

1992

fDate

9/1/1992 12:00:00 AM

Firstpage

705

Lastpage

712

Abstract

A unified approach to the realization of forward and inverse discrete cosine transforms is proposed. With this approach, an odd prime length DCT/IDCT with two half-length convolutions can be realized without extra overhead in terms of the number of multiplications. The formulation is most suitable for realization using distributed arithmetic, in which case typical convolvers can be used as the core unit for the hardware implementation of the transforms. Hence, an efficient unified DCT/IDCT chip is proposed to demonstrate the superiority of the formulation. The proposed architecture can easily meet the speed requirement of 14.3 MHz real-time operation with the current 2 μm CMOS technology

Keywords

CMOS integrated circuits; VLSI; digital arithmetic; digital signal processing chips; discrete cosine transforms; special purpose computers; 14.3 MHz; 2 μm CMOS technology; 2 micron; convolvers; discrete cosine transform; distributed arithmetic; formulation; half-length convolutions; hardware implementation; inverse discrete cosine transforms; number of multiplications; odd prime length DCT/IDCT; real-time operation; realization; speed requirement; unified DCT/IDCT chip; Arithmetic; CMOS technology; Convolution; Convolutional codes; Discrete Fourier transforms; Discrete cosine transforms; Discrete transforms; Hardware; Karhunen-Loeve transforms; Signal processing algorithms;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.250161

Filename

250161