DocumentCode
988581
Title
Floating-Gate Nonvolatile Memory With Ultrathin 5-nm Tunnel Oxide
Author
Ma, Yanjun ; Deng, Rui ; Nguyen, H. ; Wang, Bin ; Pesavento, Alberto ; Niset, M. ; Paulsen, Ron
Author_Institution
Impinj, Inc., Seattle, WA
Volume
55
Issue
12
fYear
2008
Firstpage
3476
Lastpage
3481
Abstract
Reliability results of floating-gate (FG) memory using 5-nm tunnel oxides in mature (0.25 mum) to advanced (65 nm) logic processes from multiple foundries are reported. Good intrinsic retention is seen across the process nodes studied and for gate oxides as thin as 4.8 nm. With differential memory cells, we also demonstrate promising reliability results with respect to program-cycle-induced tail bits. We conclude that it is possible to develop a small-bit-count FG nonvolatile memory (NVM) array using 5-nm oxide, enabling embedded logic NVM in advanced CMOS processes with no additional masks or processing steps.
Keywords
CMOS logic circuits; CMOS memory circuits; foundries; logic circuits; random-access storage; CMOS; floating-gate nonvolatile memory; foundries; size 0.25 mum; size 4.8 nm; size 5 nm; size 65 nm; tunnel oxide; CMOS logic circuits; CMOS process; EPROM; Flash memory; Foundries; Logic arrays; Logic devices; Nonvolatile memory; Tail; Voltage; CMOS memory; EEPROM; floating gate (FG); reliability;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2008.2006538
Filename
4674593
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