DocumentCode
988648
Title
Circuit activity based logic synthesis for low power reliable operations
Author
Roy, Kaushik ; Prasad, Sharat C.
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
Volume
1
Issue
4
fYear
1993
Firstpage
503
Lastpage
513
Abstract
A system developed to synthesize both finite state machines and combinational logic for low-power applications, called SYCLOP, is described. SYCLOP tries to minimize the transition density at the internal nodes of a circuit to minimize power dissipation during normal operation. As input signal probabilities and transition densities are considered during the synthesis process, a particular circuit can be synthesized in different ways for different applications that require different types of inputs. For the present state inputs to the combinational circuit of a state machine, simulation was used to determine the signal probabilities and transition densities. The algorithm is not limited by the number of bits used for state assignment. The multilevel optimization process extracts kernels so that there is a balance between area and power optimization. Results have been obtained for a wide range of MCNC benchmark examples.<>
Keywords
CMOS integrated circuits; VLSI; combinatorial circuits; finite state machines; logic CAD; many-valued logics; probability; CMOS VLSI; MCNC benchmark examples; SYCLOP; area optimization; circuit activity; combinational logic; finite state machines; input signal probabilities; internal nodes; logic synthesis; low power reliable operations; multilevel optimization process; power dissipation; power optimization; transition density; Automata; Circuit simulation; Circuit synthesis; Combinational circuits; Kernel; Logic circuits; Power dissipation; Power system reliability; Signal processing; Signal synthesis;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.250198
Filename
250198
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