Title :
Cost-effective LFSR synthesis for optimal pseudoexhaustive BIST test sets
Author :
Kagaris, Dimitrios ; Tragoudas, Spyros
Author_Institution :
Comput. Sci. Program, Dartmouth Coll., Hanover, NH, USA
Abstract :
The generation of pseudoexhaustive test sets for the built-in self-test (BIST) of combinational circuits is addressed, using as a test pattern generator a simple linear feedback register (LFSR), structure, known as LFSR/SR. It is shown that particular orderings of the LFSR cells can significantly reduce the test set size. In addition, it is shown that an LFSR/SK designed with a particular cell ordering and the allowance of a marginal number of additional cells guarantees pseudoexhaustive test sets of the minimum size 2/sup w/, where w is the maximum input dependency limit of the circuit under test. Extensive experimentation on benchmark circuits and comparisons with the hardware overhead of other methods indicate the advantage of this approach.<>
Keywords :
built-in self test; combinatorial circuits; logic testing; shift registers; LFSR synthesis; LFSR/SK; LFSR/SR; additional cells; benchmark circuits; cell ordering; circuit under test; combinational circuits; hardware overhead; linear feedback register; maximum input dependency limit; minimum size; optimal pseudoexhaustive BIST test sets; test pattern generator; test set size; Automatic testing; Benchmark testing; Built-in self-test; Circuit synthesis; Circuit testing; Combinational circuits; Hardware; Registers; Strontium; Test pattern generators;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
