Title :
Electrical resistance as a limiting factor for high performance computer packaging
Author_Institution :
Hitachi, Ltd., Tokyo, Japan
fDate :
5/1/1989 12:00:00 AM
Abstract :
A formula is derived for the estimation of the packaging performance limit caused by wire resistance. This is applicable to the evaluation of the usefulness of high-temperature superconductors for improving computer packaging performance. The theoretical limit of wire delay caused by resistance is estimated to be several picoseconds from the case studies carried out using the formula.<>
Keywords :
high-temperature superconductors; packaging; high performance computer packaging; high-temperature superconductors; performance limit; wire delay; wire resistance; Conducting materials; Electric resistance; Equations; High performance computing; High temperature superconductors; Large scale integration; Packaging; Printed circuits; Superconducting filaments and wires; Superconducting transmission lines;
Journal_Title :
Circuits and Devices Magazine, IEEE
