DocumentCode
988920
Title
Systolic convolution array
Author
Simons, J.A.E.
Author_Institution
Private Address, Cheltenham, UK
Volume
19
Issue
21
fYear
1983
Firstpage
874
Abstract
A systolic convolution array is presented, which has the minimum possible number of register stages, fixed fan-out, fan-in and response time, and which accepts a single input stream at the clock rate.
Keywords
cellular arrays; integrated logic circuits; large scale integration; clock rate; fixed fan-in; fixed fan-out; register stages; response time; single input stream; systolic convolution array;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19830595
Filename
4248123
Link To Document