Title :
Fault location for nonlinear resistive circuits
Author :
Rutkowski, J. ; Macura, A.
Author_Institution :
Silesian Technical University, Institute of Electronics, Gliwice, Poland
Abstract :
The letter deals with fault location in nonlinear resistive circuits taking the design tolerances of the nonfaulty circuit parameters into consideration. The method described is based on measurements of node voltages at a single test. It belongs to the class of topological methods, and two-terminal as well as m-terminal elements are permitted.
Keywords :
fault location; network topology; nonlinear network analysis; design tolerances; fault location; m-terminal elements; node voltages; nonlinear resistive circuits; topological methods; two terminal elements;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19840278
