DocumentCode :
993100
Title :
Detection and optimization of temperature distribution across large-area power MOSFETs to improve energy capability
Author :
Khemka, Vishnu ; Parthasarathy, Vijay ; Zhu, Ronghua ; Bose, Amitava ; Roggenbauer, Todd
Author_Institution :
SMARTMOS Technol. Center, Tempe, AZ, USA
Volume :
51
Issue :
6
fYear :
2004
fDate :
6/1/2004 12:00:00 AM
Firstpage :
1025
Lastpage :
1032
Abstract :
Temperature distribution inside a large-area reduced-surface field (RESURF) lateral double-diffused MOSFETs (LDMOSFETs) is studied with the help of experiments and theoretical modeling. Diode sensors are integrated inside a large area device to map the temperature as a function of distance. Temperature distribution is then optimized with the help of distribution of power across the device. Several layout techniques are presented and experimentally demonstrated for realizing this power distribution. It is shown that power applied to the device can be graded across the device by varying the saturation drain current in different parts of the device. Conventional devices with uniform power distribution achieved a critical failure temperature of 650 K at a drain to source voltage of about 40 V with a corresponding energy of 160 mJ/mm2, whereas devices with graded power distribution achieved a critical failure temperature of about 560 K, even though the total energy capability of the device increases to 192 mJ/mm2. It is also shown that the destruction point in the device shifts from the center of the device to the periphery. It is observed that as the power is graded across the device there is a counter balancing effect created by the increased impact ionization around the periphery of the device, which limits the energy capability improvement to be gained. Reducing the impact ionization rate by operating the device at Vds=30 V showed an increase in critical temperature for the graded distribution device to 610 K.
Keywords :
MOS integrated circuits; MOSFET; circuit optimisation; impact ionisation; semiconductor device models; temperature distribution; thermal analysis; thermal resistance; 160 mJ; 192 mJ; 40 V; 560 K; 650 K; LDMOS; LDMOSFET; RESURF; SOA; breakdown voltage; counter balancing effect; critical failure temperature; destruction point; device periphery; diode sensors; diode temperature sensor; distance function; electrical failure; electrothermal failure; energy capability improvement; impact ionization; intrinsic temperature; large-area power MOSFET; large-area reduced-surface field; lateral double-diffused MOS; lateral double-diffused MOSFETs; layout techniques; optimization; power distribution; safe operating area; saturation drain current; smart-power; source voltage; specific on-resistance; temperature distribution; temperature mapping; theoretical modeling; Diodes; Electrothermal effects; Impact ionization; MOSFETs; Power distribution; Semiconductor optical amplifiers; Silicon; Temperature distribution; Temperature sensors; Voltage; Breakdown voltage; LDMOS; RESURF; SOA; diode temperature sensor; electrical failure; electrothermal; electrothermal failure; energy capability; intrinsic temperature; lateral double-diffused MOS; power distribution; reduced-surface field; safe operating area; smart-power; specific on-resistance; thermal failure;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2004.828278
Filename :
1300840
Link To Document :
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