DocumentCode :
993656
Title :
Time response of small capacitance tunnel junctions and the simulation of fast logic circuits
Author :
de Lustrac, A. ; Crozat, P. ; Adde, R.
Author_Institution :
Université Paris, Orsay, France
Volume :
19
Issue :
3
fYear :
1983
fDate :
5/1/1983 12:00:00 AM
Firstpage :
1221
Lastpage :
1224
Abstract :
A simulation method of small time constant Josephson tunnel junctions is developped. It is based on a first order series expansion of the time dependent Josephson current given by the microscopic BCS theory. The method is well adapted to the switching dynamic of logic gates when the RSJC model lacks of accuracy, has a comparable efficiency both in computer time and memory space. The scaling down of resistively coupled logic gates is presented among the illustrations.
Keywords :
Josephson device logic circuits; Capacitance; Circuit simulation; Equations; Josephson effect; Josephson junctions; Logic circuits; Logic gates; Microscopy; Time factors; Voltage;
fLanguage :
English
Journal_Title :
Magnetics, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9464
Type :
jour
DOI :
10.1109/TMAG.1983.1062339
Filename :
1062339
Link To Document :
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