• DocumentCode
    994261
  • Title

    Evaluation of Low-Density Parity-Check Codes on Perpendicular Magnetic Recording Model

  • Author

    Hu, Xinde ; Kumar, Vijaya B V K

  • Author_Institution
    Data Storage Syst. Center, Carnegie Mellon Univ., Pittsburgh, PA
  • Volume
    43
  • Issue
    2
  • fYear
    2007
  • Firstpage
    727
  • Lastpage
    732
  • Abstract
    Low-density parity-check (LDPC) codes have shown superior error-correcting performance in a variety of data storage system studies, including traditional longitudinal magnetic recording systems. However, perpendicular magnetic recording systems (of increasing interest) exhibit impairments different from longitudinal magnetic recording systems, and thus present new challenges for error-correcting codes. In this effort, we evaluate a structured LDPC code using a perpendicular magnetic recording channel model that includes impairments such as transition noise, nonlinear transition shift, transition percolation, and baseline wander (BLW). The channel model, as well as the LDPC encoder and the decoder are implemented in field-programmable gate array (FPGA) hardware. The LDPC coded system is evaluated down to bit error rate (BER) of 10-12 and frame error rate (FER) of 10-8. The impact of individual impairments on coding performance is studied separately. The soft output Viterbi algorithm (SOVA) + LDPC system maintains its superior error-correcting performance under the perpendicular recording channel
  • Keywords
    Viterbi decoding; error correction codes; error statistics; field programmable gate arrays; parity check codes; perpendicular magnetic recording; BER; FPGA; LDPC codes; baseline wander; bit error rate; channel model; data storage system; error-correcting codes; field-programmable gate array; frame error rate; low-density parity-check codes; nonlinear transition shift; perpendicular magnetic recording model; soft output Viterbi algorithm; transition noise; transition percolation; Bit error rate; Data storage systems; Decoding; Error correction codes; Field programmable gate arrays; Hardware; Magnetic noise; Magnetic recording; Parity check codes; Perpendicular magnetic recording; Baseline wander (BLW); EPR4; field-programmable gate array (FPGA); low-density parity-check (LDPC) code; magnetic recording; nonlinear transition shift; partial erasure; perpendicular magnetic recording; transition percolation;
  • fLanguage
    English
  • Journal_Title
    Magnetics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9464
  • Type

    jour

  • DOI
    10.1109/TMAG.2006.888370
  • Filename
    4069025