Full adder-based arithmetic units for finite integer rings

Most implementations of accumulators, multipliers, or multiplier-accumulator units, operating in a finite integer ring, R(m), are based on ROM´s or PLA´s. This paper proposes a full adder-based arithmetic unit, called an (FA)-based AU_m, capable of performing both addition and general multiplication at the same time, in R(m). For all moduli, FA-based AU_m´s are shown to execute much faster and have much less hardware complexity and smaller time-complexity products than ROM-based AU_m´s. For large values of m, they are also shown to be less complex and have smaller time-complexity products than ROM-based units, which are capable of performing multiplication only by a constant. Since the proposed units use full adders as the basic building block, they result in easy-to-design, modular, and regular VLSI implementations