DocumentCode :
995991
Title :
Demultiplexer IC for MPEG2 transport streams
Author :
Hanna, C. ; Gillies, D. ; Cochon, E. ; Dorner, A. ; Alred, J. ; Hinkle, M.
Author_Institution :
Corp. Res. Centre, Thomson Multimedia, Strasbourg, France
Volume :
41
Issue :
3
fYear :
1995
fDate :
8/1/1995 12:00:00 AM
Firstpage :
699
Lastpage :
706
Abstract :
The MPEG2 systems was adopted as an international standard that specifies the multiplexed structure for combining audio and video data and a means of representing the timing information needed to replay synchronized sequences in real-time. This paper describes an integrated circuit developed to demultiplex desired programmes carried in an MPEG2 compatible transport stream. Up to nine simultaneous PIDs (packet identifiers) can be processed by the IC. The The MPEG2 demultiplexer is a fully static CMOS integrated circuit realized as an 0.8 μm gate array
Keywords :
CMOS logic circuits; demultiplexing equipment; digital signal processing chips; logic arrays; telecommunication standards; video signal processing; 0.8 μm gate array; 0.8 micron; MPEG2 transport streams; audio data; demultiplexer IC; international standard; packet identifiers; static CMOS integrated circuit; synchronized sequences; timing information representation; video data; Decoding; Demultiplexing; Design engineering; Filtering; Hardware; Integrated circuit modeling; Microcomputers; Streaming media; Systems engineering and theory; Transform coding;
fLanguage :
English
Journal_Title :
Consumer Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-3063
Type :
jour
DOI :
10.1109/30.468020
Filename :
468020
Link To Document :
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