Title :
A cost effective motion estimation processor LSI using a simple and efficient algorithm
Author :
Ogura, Eiji ; Ikenaga, Yuuichirou ; Iida, Yuki ; Hosoya, Yoshitaka ; Takashima, Masatoshi ; Yamashita, Keitaro
Author_Institution :
Sony Corp., Tokyo, Japan
fDate :
8/1/1995 12:00:00 AM
Abstract :
A motion estimation processor LSI has been developed using a simple and efficient algorithm while maintaining the accuracy of full search block matching. Only a single chip is required for performing field and frame real-time motion estimation at half-pel precision. This chip is capable of processing ITU-R601 video sequence for MPEG2 encoding with a 27 MHz clock
Keywords :
digital signal processing chips; image matching; image sequences; large scale integration; motion compensation; motion estimation; video coding; 27 MHz; ITU-R601 video sequence; MPEG2 encoding; algorithm; clock; filed motion estimation; frame motion estimation; full search block matching; motion compensation; motion estimation processor LSI; real-time motion estimation; Clocks; Costs; Encoding; Hardware; High performance computing; Large scale integration; Motion estimation; Transform coding; Video compression; Video sequences;
Journal_Title :
Consumer Electronics, IEEE Transactions on
