Title :
Implementation of low power one-chip MUSE (HDTV) video processor using consumer oriented macros, etc
Author :
Aoki, Tetsuo ; Kadomaru, Noriko ; Kamo, Yoshihiko ; Iwayoshi, Takeshi ; Asami, Fumitaka ; Miyabe, Kenji ; Kohiyama, Kiyoshi
Author_Institution :
Fujitsu Labs. Ltd., Japan
fDate :
8/1/1995 12:00:00 AM
Abstract :
We describe the development of a one-chip video MUSE decoder by reducing the circuit size from 230000 gates to 160000 gates through logic optimization, memory reconfiguration, and the development of specialized macros. The low power design allowed us to mount the chip on inexpensive plastic packages
Keywords :
decoding; digital signal processing chips; high definition television; integrated circuit packaging; plastic packaging; video coding; HDTV; circuit size; consumer oriented macros; decoder; inexpensive plastic packages; logic optimization; low power design; low power one-chip MUSE video processor; memory reconfiguration; specialized macros; Circuits; Clocks; Costs; Decoding; Delay lines; Energy consumption; HDTV; Plastic packaging; Random access memory; Read-write memory;
Journal_Title :
Consumer Electronics, IEEE Transactions on
