A Heavy-Ion Tolerant Clock and Data Recovery Circuit for Satellite Embedded High-Speed Data Links

Author

Lapuyade, H. ; Mazouffre, O. ; Goumballa, B. ; Pignol, M. ; Malou, F. ; Neveu, C. ; Pouget, V. ; Deval, Y. ; Bégueret, J.B.

Author_Institution

Univ. Bordeaux 1, Talence

Volume

54

Issue

6

fYear

2007

Firstpage

2080

Lastpage

2085

Abstract

A clock and data recovery (CDR) circuit dedicated to satellite embedded high-speed data links is implemented in a 0.13 mum CMOS technology. Its radiation hardening is obtained thanks to an innovative architecture based on an injection-locked oscillator (ILO) associated with a phase-alignment circuit. Its low single-event transient (SET) sensitivity is shown thanks to heavy-ion and laser testing.

Keywords

injection locked oscillators; radiation hardening (electronics); synchronisation; heavy-ion tolerant clock and data recovery circuit; injection-locked oscillator; phase-alignment circuit; radiation hardening; satellite embedded high-speed data links; single-event transient; size 0.13 mum; CMOS technology; Circuit testing; Clocks; Flip-flops; Frequency synchronization; Injection-locked oscillators; Phase locked loops; Radiation hardening; Satellites; Voltage-controlled oscillators; CMOS technology; Clock and data recovery (CDR); heavy-ion testing; high-speed data links; injection-locked oscillators (ILO); laser testing; radiation hardening by design; single-event transients (SET);

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2007.910866

Filename

4395053