DocumentCode
997004
Title
A Quantitative Assessment of Charge Collection Efficiency of N+ and P+ Diffusion Areas in Terrestrial Neutron Environment
Author
Zhu, Xiaowei ; Deng, Xiaowei ; Baumann, Robert ; Krishnan, Srikanth
Author_Institution
Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX
Volume
54
Issue
6
fYear
2007
Firstpage
2156
Lastpage
2161
Abstract
Using a detailed memory failure cluster analysis we demonstrate a novel direct measurement of the charge collection efficiency ratio of N+ and P+ diffusions for 90 nm CMOS in the terrestrial neutron environment. For the first time, we have proved empirically that the Nwell junction is a strong barrier to charge sharing, and experimentally measured the ratio to be 4.5 for the 90 nm CMOS technology. This result provides a critical parameter for SEU circuit simulations. In addition, the accurate measurement of this parameter provides circuit designers a quantitative way to size the transistors based on their types for design hardening.
Keywords
CMOS memory circuits; SRAM chips; diffusion; neutron effects; CMOS technology; Nwell junction; SEU circuit simulations; SRAM; charge collection efficiency; diffusion; memory failure cluster analysis; terrestrial neutron environment; Area measurement; CMOS technology; Charge measurement; Circuit simulation; Current measurement; Digital signal processing chips; Integrated circuit technology; Neutrons; Particle beams; Time measurement; Charge collection; multiple bit upset; neutron; single event; soft error;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2007.908758
Filename
4395095
Link To Document