Strained-Si-strained-SiGe dual-channel layer structure as CMOS substrate for single workfunction metal-gate technology

Author

Yu, Shaofeng ; Jung, Jongwan ; HOyt, Judy L. ; Antoniadis, Dimitri A.

Author_Institution

Texas Instrum., Inc., USA

Volume

25

Issue

6

fYear

2004

fDate

6/1/2004 12:00:00 AM

Firstpage

402

Lastpage

404

Abstract

The strained-Si-strained-SiGe dual-channel layer substrate is known for its mobility advantage. This letter investigates its potential as a CMOS substrate that would enable single workfunction metal-gate electrode technology. Simulation shows that a single metal electrode with workfunction of 4.5 eV produces near-ideal CMOS performance on a dual-channel layer substrate that consists sequentially of a silicon wafer, an epitaxially grown 30% Ge relaxed SiGe layer, a compressively strained 60% Ge layer, and a tensile-strained-Si cap layer. Measured threshold voltages in experimental TiN gate n- and p-MOSFETs built on such dual-channel layer substrates support the simulation analysis.

Keywords

CMOS integrated circuits; MOSFET; epitaxial growth; metal-semiconductor-metal structures; silicon compounds; substrates; work function; 4.5 eV; CMOS substrate; CMOSFET; TiN; dual heterostructure; epitaxial layer; silicon wafer; single workfunction metal-gate technology; strained-Si-strained-SiGe dual-channel layer structure; CMOS technology; Capacitive sensors; Degradation; Electrodes; Electrostatics; Germanium silicon alloys; MOS devices; Silicon germanium; Substrates; Threshold voltage; CMOSFETs; SiGe; dual heterostructure; expitaxial layer; metal-gate; strain;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2004.829038

Filename

1302240