DocumentCode :
997124
Title :
Voltage-splitting technique for reliability evaluation of off-state mode of MOSFETs in ultrathin gate oxides
Author :
Wu, Ernest ; Nowak, Edward
Author_Institution :
Microelectron. Div., IBM Co., Essex Junction, VT, USA
Volume :
25
Issue :
6
fYear :
2004
fDate :
6/1/2004 12:00:00 AM
Firstpage :
414
Lastpage :
416
Abstract :
A simple and practical new methodology is proposed for reliability evaluation of off-state mode in ultrathin oxides. By applying a negative voltage on the gate while the drain region is biased at the operating voltage; the so-called voltage-splitting technique (VST), we successfully resolve the difficulty associated with the unrealistic high drain-bias stress otherwise required, which leads to the excessive damage to oxide integrity in the overlap region. In comparison with a high drain-bias stress, the time-dependent dielectric breakdown measurements using VST show the well-behaved breakdown distribution and correlate with the measured device characteristics. In addition, this methodology may provide a possible method to extrapolate stress data to operational voltage for realistic off-state reliability projection.
Keywords :
MOSFET; dielectric measurement; semiconductor device reliability; MOSFET; dielectric reliability; gate oxide reliability; high drain-bias stress; negative voltage; off-state mode; oxide breakdown; reliability evaluation; time-dependent dielectric breakdown; ultrathin gate oxides; voltage-splitting technique; Circuits; Degradation; Dielectric breakdown; Dielectric measurements; Electric breakdown; FETs; Lead compounds; Low voltage; MOSFETs; Stress measurement; Dielectric reliability; TDDB; gate oxide reliability; oxide breakdown; time-dependent dielectric breakdown;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2004.829036
Filename :
1302244
Link To Document :
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