Title :
Complementary ferroelectric-capacitor logic for low-power logic-in-memory VLSI
Author :
Kimura, Hiromitsu ; Hanyu, Takahiro ; Kameyama, Michitaka ; Fujimori, Yoshikazu ; Nakamura, Takashi ; Takasu, Hidemi
Author_Institution :
Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
fDate :
6/1/2004 12:00:00 AM
Abstract :
A novel nonvolatile logic style, called complementary ferroelectric-capacitor (CFC) logic, is proposed for low-power logic-in-memory VLSI, in which storage elements are distributed over the logic-circuit plane. Standby currents in distributed storage elements can be cut off by using ferroelectric-based nonvolatile storage elements, and the standby power dissipation can be greatly reduced. Since the nonvolatile storage and the switching functions are merged into ferroelectric capacitors by the capacitive coupling effect, reduction of active device counts can be achieved. The use of complementary stored data in coupled ferroelectric capacitors makes it possible to perform a switching operation with small degradation of the nonvolatile charge at a low supply voltage. The restore operation can be performed by only applying the small bias across the ferroelectric capacitor, which reduces the dynamic power dissipation. Applying the proposed circuitry in a fully parallel 32-bit content-addressable memory results in about 2/3 dynamic power reduction and 1/7700 static power reduction with chip size of 1/3, compared to a CMOS implementation using 0.6-μm ferroelectric/CMOS.
Keywords :
CMOS memory circuits; VLSI; content-addressable storage; ferroelectric capacitors; ferroelectric storage; logic circuits; logic design; low-power electronics; 0.6 micron; 32 bits; CMOS implementation; active device; capacitive coupling effect; complementary ferroelectric-capacitor logic; content-addressable memory; distributed storage elements; dynamic logic; logic-circuit plane; logic-in-memory VLSI; nonvolatile storage elements; pass-transistor logic; pseudo nondestructive read operation; standby power dissipation; static power reduction; switching functions; switching operation; CMOS memory circuits; Capacitors; Coupling circuits; Degradation; Ferroelectric materials; Logic; Low voltage; Nonvolatile memory; Power dissipation; Very large scale integration; CAM; Content-addressable memory; dynamic logic; ferroelectric capacitor; nonvolatile storage; pass-transistor logic; pseudo non-destructive read operation;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.827802