Design and implementation of transport stream demultiplexer in HDTV decoder SoC

Author

Zhang, Chunrong ; Zheng, Shibao ; Wang, Feng ; Yuan, Chi

Author_Institution

Inst. of Image Commun. & Inf. Process., Shanghai Jiao Tong Univ., China

Volume

51

Issue

2

fYear

2005

fDate

5/1/2005 12:00:00 AM

Firstpage

642

Lastpage

647

Abstract

A novel architecture of transport stream demultiplexer (TS Demux) in high definition television (HDTV) decoder is presented in this paper, which utilizes a cooperation scheme between hardware and software. TS parsing is decomposed into two phases: filtering and analyzing, which are fulfilled by hardware and software respectively. Meanwhile, the hardware filtering is controlled by the software. Two filtering layers, PID and section filtering, are supported by hardware, which can extract any format data in TS stream quickly. Compared to the current parsing scheme for TS packets, TS Demux discussed here needs less CPU resource and is easy to update as well.

Keywords

decoding; demultiplexing equipment; high definition television; system-on-chip; video coding; video streaming; HDTV decoder; PID filtering; SoC; current parsing scheme; hardware filtering; high definition television decoder; section filtering; transport stream demultiplexer; Computer architecture; Data mining; Decoding; Digital TV; Filtering; HDTV; Hardware; Streaming media; System-on-a-chip; TV broadcasting;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/TCE.2005.1468013

Filename

1468013