Title :
A Fault-Driven, Comprehensive Redundancy Algorithm
Author_Institution :
Teradyne, Inc.
fDate :
6/1/1985 12:00:00 AM
Abstract :
This article describes a fault-driven algorithm that generates all possible repair solutions for a given bit failure pattern in a redundant RAM. Benefits of this approach include the ability to select repair solutions based on userdefined preferences (for example, fewest total elements invoked or fewest rows invoked). Perhaps the greatest advantage of this algorithm is its ability to generate solutions for any theoretically repairable die that would be deemed unrepairable by existing algorithms.
Keywords :
Algorithm design and analysis; Counting circuits; Decoding; Failure analysis; Redundancy; Semiconductor device manufacture; Semiconductor memory; Throughput;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.1985.294737