Title :
Analogue c.c.d. correlator using monolithic m.o.s.t. multipliers
Author :
Mavor, J. ; Arthur, J.W. ; Denyer, P.B.
Author_Institution :
University of Edinburgh, Electrical Engineering Department, Edinburgh, UK
Abstract :
A 32-stage analogue correlator has been hybridised by using a multitapped c.c.d. delay line and m.o.s.t. multipliers fabricated on the same silicon chip. A multiple-port sample¿hold system has been adopted for storage of the reference signal, thereby allowing it to be refreshed continuously. The viability of a design for a fully analogue monolithic c.c.d. correlator is established.
Keywords :
charge-coupled device circuits; correlators; signal processing; analogue correlator; charge coupled devices; monolithic MOST multipliers; multiple part sample hold systems; multitapped CCD delay line;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19770271
