• DocumentCode
    998360
  • Title

    Analogue c.c.d. correlator using monolithic m.o.s.t. multipliers

  • Author

    Mavor, J. ; Arthur, J.W. ; Denyer, P.B.

  • Author_Institution
    University of Edinburgh, Electrical Engineering Department, Edinburgh, UK
  • Volume
    13
  • Issue
    12
  • fYear
    1977
  • Firstpage
    373
  • Lastpage
    374
  • Abstract
    A 32-stage analogue correlator has been hybridised by using a multitapped c.c.d. delay line and m.o.s.t. multipliers fabricated on the same silicon chip. A multiple-port sample¿hold system has been adopted for storage of the reference signal, thereby allowing it to be refreshed continuously. The viability of a design for a fully analogue monolithic c.c.d. correlator is established.
  • Keywords
    charge-coupled device circuits; correlators; signal processing; analogue correlator; charge coupled devices; monolithic MOST multipliers; multiple part sample hold systems; multitapped CCD delay line;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19770271
  • Filename
    4249422
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=998360