DocumentCode :
998486
Title :
ZZZip through VLSI Design with VERILOG
Volume :
2
Issue :
4
fYear :
1985
Firstpage :
9
Lastpage :
9
Abstract :
Advertisement: ZZZip through VLSI Design with VERILOG.
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.1985.294711
Filename :
4069615
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=998486
