• DocumentCode
    998835
  • Title

    Common subexpression elimination algorithm for low-cost multiplierless implementation of matrix multipliers

  • Author

    Macleod, M.D. ; Dempster, A.G.

  • Author_Institution
    QinetiQ Ltd., Malvern, UK
  • Volume
    40
  • Issue
    11
  • fYear
    2004
  • fDate
    5/27/2004 12:00:00 AM
  • Firstpage
    651
  • Lastpage
    652
  • Abstract
    The design of multiplierless implementations (which use only adders, subtracters and binary shifts) of fixed-point matrix multipliers is considered and a new common subexpression elimination method is described that recursively extracts signed two-term common subexpressions. Examples are given that show that the resulting adder-cost is significantly lower than for existing algorithms.
  • Keywords
    adders; fixed point arithmetic; matrix multiplication; multiplying circuits; adder cost; adders; binary shifts; common subexpression elimination algorithm; fixed point matrix multipliers; multiplierless implementation; subtracters; two-term common subexpressions;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20040436
  • Filename
    1302782