Title :
Common subexpression elimination algorithm for low-cost multiplierless implementation of matrix multipliers
Author :
Macleod, M.D. ; Dempster, A.G.
Author_Institution :
QinetiQ Ltd., Malvern, UK
fDate :
5/27/2004 12:00:00 AM
Abstract :
The design of multiplierless implementations (which use only adders, subtracters and binary shifts) of fixed-point matrix multipliers is considered and a new common subexpression elimination method is described that recursively extracts signed two-term common subexpressions. Examples are given that show that the resulting adder-cost is significantly lower than for existing algorithms.
Keywords :
adders; fixed point arithmetic; matrix multiplication; multiplying circuits; adder cost; adders; binary shifts; common subexpression elimination algorithm; fixed point matrix multipliers; multiplierless implementation; subtracters; two-term common subexpressions;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20040436