Title :
Modulo M multiplication-addition: algorithms and FPGA implementation
Author :
Beuchat, J.-L. ; Muller, J.-M.
Author_Institution :
Ecole Normale Superieure de Lyon, Lab. de l´´Informatique du Parallelisme, Lyon, France
fDate :
5/27/2004 12:00:00 AM
Abstract :
Variants of a modular multiplication algorithm originally due to Koc$80 and Hung (1990), that are especially suited for FPGA implementation, and that allow to compute (XY+W) modulo M, where there is no need to know M at design-time, are presented. Some results obtained on a Xilinx Virtex-E FPGA are shown.
Keywords :
field programmable gate arrays; multiplying circuits; residue number systems; Xilinx Virtex-E FPGA; field programmable gate array; modular multiplication algorithm; modulo M multiplication-addition;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20040463
