DocumentCode :
999099
Title :
Gentest: an automatic test-generation system for sequential circuits
Author :
Cheng, Wu-Tung ; Chakraborty, Tapan J.
Author_Institution :
AT&T Bell Lab., Princeton, NJ, USA
Volume :
22
Issue :
4
fYear :
1989
fDate :
4/1/1989 12:00:00 AM
Firstpage :
43
Lastpage :
49
Abstract :
A description is given of Gentest, with emphasis on STG2, a sequential test generator that uses the Back test-generation algorithm and the Split value model. The performance of STG2 on a Convex C-1 computer is compared with that of its predecessor, STG1 and STG1.5. Results are also presented for another set of experiments for Gentest on a Sun 3/60 workstation.<>
Keywords :
VLSI; circuit analysis computing; integrated circuit testing; integrated logic circuits; logic testing; sequential circuits; BIST; Back test-generation algorithm; Convex C-1 computer; Gentest; STG2; Split value model; Sun 3/60 workstation; VLSI; automatic test-generation system; sequential circuits; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Counting circuits; Electrical fault detection; Fault detection; Sequential analysis; Sequential circuits; System testing;
fLanguage :
English
Journal_Title :
Computer
Publisher :
ieee
ISSN :
0018-9162
Type :
jour
DOI :
10.1109/2.25381
Filename :
25381
Link To Document :
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