Title :
New ECL gate in BiFET process
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
Abstract :
An ECL gate is implemented as a combination of bipolar and MOS circuits in a BiFET process is presented. The resulting ECL gate exhibits an improved speed-power product over circuits presented in the past. Owing to its reduced power consumption this gate allows a higher level of integration for ECL. The process used is standard BiCMOS.
Keywords :
BiCMOS integrated circuits; emitter-coupled logic; integrated logic circuits; logic gates; 2 mW; BiCMOS; BiFET process; ECL gate; ECL integration level; power consumption; speed-power product;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19931354
