Author :
Sutherland Stuart
AlternativeTitle :
System Verilog for design: a guide to using System Verilog for hardware design and modeling
Publication :
Berline Springer
Collation :
xxx، 418، illus، tables، map/maps
Added entries :
AU نويسنده همكار Davidmann Simon , AU نويسنده همكار Flake Peter , AU مقدمه نویس Moorby Phil
Subject :
Verilog (Computer hardware description language) , Electronic digital computers- Design and construction , Computer simulation
