ﻃﺮاﺣﯽ ﮔﯿﺖ واروﻧﮕﺮ ﺟﺪﯾﺪ در ﻣﻨﻄﻖ ﺳﻪ ارزﺷﯽ ﻣﺒﺘﻨﯽ ﺑﺮ ﺗﺮاﻧﺰﯾﺴﺘﻮر ﻧﺎﻧﻮ ﺳﯿﻢ

Design of New Ternary Inverter Gate Based on the Nanowire Transistor

ﭼﮑﯿﺪه: در اﯾﻦ ﻣﻘﺎﻟﻪ، ﯾﮏ ﮔﯿﺖ واروﻧﮕﺮ ﺟﺪﯾﺪ در ﻣﻨﻄﻖ ﺳﻪ ارزﺷﯽ ﺑﺎ اﺳﺘﻔﺎده از ﺗﺮاﻧﺰﯾﺴﺘﻮر ﻧﺎﻧﻮ ﺳﯿﻢ ﻃﺮاﺣﯽ ﺷﺪه اﺳﺖ. ﻫﺴﺘﻪ اﺻﻠﯽ اﯾﻦ ﻃﺮاﺣﯽ ﯾﮏ ﺗﺮاﻧﺰﯾﺴﺘﻮر ﻧﺎﻧﻮ ﺳﯿﻢ ﺑﺎ ﺳﻄﺢ ﻣﻘﻄﻊ )7nm×7nm(، اﺣﺎﻃﻪ ﺷﺪه ﺑﺎ اﮐﺴﯿﺪ ﺳﯿﻠﯿﺴﯿﻮم ﻣﯽ ﺑﺎﺷﺪ و روي آن اﮐﺴﯿﺪ، ﺳﻪ ﮔﯿﺖ ﻣﺠﺰا ﻗﺮار داده ﺷﺪه اﺳﺖ. ﺑﺎ اﺳﺘﻔﺎده از اﯾﻦ ﻃﺮاﺣﯽ، ﻫﺮ ﺳﻪ ﻗﺴﻤﺖ واروﻧﮕﺮ ﺷﺎﻣﻞ ﺳﻪ ارزﺷﯽ اﺳﺘﺎﻧﺪارد STI)(، ﺳﻪ ارزﺷﯽ ﻣﻨﻔﯽ NTI)( و ﺳﻪ ارزﺷﯽ ﻣﺜﺒﺖ )PTI(، ﺑﻮﺳﯿﻠﻪ ﯾﮏ ﻣﺪار و ﺑﺪون ﺗﻐﯿﯿﺮ ﺳﺨﺖ اﻓﺰار ﭘﯿﺎده ﺳﺎزي ﺷﺪه اﺳﺖ. اﻧﺘﺨﺎب ﻧﻮع واروﻧﮕﺮ ﺑﺎ اﺳﺘﻔﺎده از ﺳﻄﺢ وﻟﺘﺎژ ﮔﯿﺖ ﻣﯽ ﺑﺎﺷﺪ. روش ﺷﺒﯿﻪ ﺳﺎزي ﺑﺼﻮرت ﺣﻞ ﺧﻮدﺳﺎزﮔﺎر ﻣﻌﺎدﻻت ﺷﺮودﯾﻨﮕﺮ-ﭘﻮاﺳﻦ ﻣﯽ ﺑﺎﺷﺪ. ﻣﯿﺰان ﺗﻮان ﻣﺼﺮﻓﯽ اﺳﺘﺎﺗﯿﮏ و ﺣﺎﺷﯿﻪ ﻫﺎي ﻧﻮﯾﺰ ﻣﺤﺎﺳﺒﻪ ﺷﺪه اﺳﺖ. ﻧﺘﺎﯾﺞ ﺷﺒﯿﻪ ﺳﺎزي ﻧﺸﺎن ﻣﯽ دﻫﺪ ﮐﻪ در ﻣﻘﺎﯾﺴﻪ ﺑﺎ ﻃﺮاﺣﯽ ﻫﺎي ﻗﺒﻠﯽ، ﻣﯿﺰان ﺣﺎﺷﯿﻪ ﻫﺎي ﻧﻮﯾﺰ ﺑﺴﯿﺎر ﺑﻬﺒﻮد ﯾﺎﻓﺘﻪ اﺳﺖ وﻟﯽ ﺗﻮان ﻣﺼﺮﻓﯽ در ﻫﻤﺎن رﻧﺞ ﺑﺎﻗﯽ ﻣﺎﻧﺪه اﺳﺖ.

In this paper by using a nanowire transistor, a new ternary inverter gate is designed. The core of this design, is a nanowire transistor with a (7nm×7nm) cross-sectional area surrounded by silicon dioxide and there are three separated gates on that oxide. By using this design, all three parts of ternary inverter include standard ternary inverter (STI), negative ternary inverter(NTI), and positive ternary inverter (PTI) are implemented by one circuit and without hardware change. The type of inverter function can be specified by the control gate voltage level. A simulation method is based on solving self-consistent Schrodinger-Poisson equations. By using this method, static power and noise margins have been calculated. The simulation results indicate that the noise margins have improved a lot compared to previous designs, but the static power remains the same.