آناليز مقايسه اي روشهاي بهبود اثرات كوچك سازي كانال در ترانزيستورهاي SOI-MOSFET و ارائه يك تكنيك جديد

A COMPREHENSIVE STUDY OF SHORT CHANNEL EFFECTS IMPROVEMENT TECHNIQUES IN SOI-MOSFET AND A NOVEL APPROACH

This paper critically examines the Short Channel Effects (SCEs) improvement techniques for improving the performance of SOI-MOSFETs. Also for first time, a new device structure called the Shielded Channel Multiple-Gate SOI-MOSFET (SC-MG) is introduced and designed. Using two-dimensional and two-carrier device simulation, it is demonstrated that the SC-MG exhibits a significantly reduced the electric field due to drain voltage. Also, variation of potential barrier up to 1.5 V is near to zero. This structure dose not has any problems in fabrication methods and need extra power supply in comprehensive with corresponding structures.