Multi-level discontinuous pulsewidth modulation: common mode voltage minimisation analysis

Pulsewidth modulation (PWM) of power converters has been intensively researched for many years and is presently well established in two-level inverter modulation. Multi-level inverter modulation is, however, relatively more complicated because of the increased number of DC voltage levels and redundant switching states available. In this paper, the concept of equivalent space vectors to link two-level and multi-level modulation is presented, and it is shown that proper placement of these equivalent vectors can give rise to different multi-level discontinuous PWM strategies with both minimal generated common mode voltage and harmonic distortion. Other issues, such as the proper selection of clamping voltage levels and required zero sequence offsets for implementing these optimised discontinuous PWM strategies are also addressed. All PWM strategies presented have been verified by both simulation and experimental results.