Sharp upper bound involving circuit layout system

In this paper, the circuit layout system in a Euclidean space is defined. By means of the algebraic, analytic, geometry and inequality theories, a sharp upper bound involving circuit layout system is obtained as follows: 1/2∑1≤j−i≤N−1,1≤i≤N∥A∗j−A∗i∥≤14√N(1+max|cos∠Ai|)csc2π2N⎷n∑i=1∥Ai+1−Ai∥2