Title of article :
Teaching Asynchronous Design in Digital Integrated Circuits
Author/Authors :
J. S. Yuan and W. Kuang، نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2004
Pages :
8
From page :
397
To page :
404
Abstract :
To introduce the basis of asynchronous digital circuit design in an electrical engineering curriculum, Null Convention Logic is presented as an innovative asynchronous paradigm. The design flow from concept to circuit implementation is discussed. First, two completeness criteria are required for speed independency: symbolic completeness of expression and completeness of input. Second, threshold gates with hysteresis are primary components, which are used to build logic gates, full adder, and registers. As an example, a 4 4 multiplier is constructed based on these threshold gates. Finally, an example of very-high-speed integration circuit hardware description language (VHDL) simulation is given to help students practice and understand the asynchronous design methodology.
Keywords :
very-high-speed integration circuit hardwaredescription language (VHDL) simulation. , Null ConventionLogic (NCL) , Asynchronous digital circuit
Journal title :
IEEE TRANSACTIONS ON EDUCATION
Serial Year :
2004
Journal title :
IEEE TRANSACTIONS ON EDUCATION
Record number :
398174
Link To Document :
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