چكيده لاتين :
Reliability analysis of critical systems is
performed using fault trees. Fault trees are then converted to
their equivalent Binary Decision Diagram, Cut Set, Markov
Chain or Bayesian Network. These approaches however are
complex and time consuming if a continuous time reliability
curve is aimed, particularly for large systems.
This paper introduces Hardware-based Reliability Tree
(HRT). The HRT can be implemented by hardware in order to
decrease reliability calculation time of a complex system. In this
method, from a given fault tree, an equivalent Reliability Tree
is generated and an equivalent hardware using op-amp, adder,
gain, and multiplier circuits, is constructed. After obtaining
continuous reliability curve over time, an integrator is utilized
for calculating time to failure of the system. In order to
evaluate the model, two systems were evaluated. The first one is
a security alarm system and the second consists of two
processors which share a single spare. In the case of failure of
each processor, the spare is activated. Evaluation of these
benchmarks using hardware implemented HRT demonstrates
an speed up of up to 3.4E+6.
