DocumentCode :
1001614
Title :
Built-In Self-Testing RAM: A Practical Alternative
Author :
Saluja, Kewal K. ; Sng, Siew H. ; Kinoshita, Kozo
Author_Institution :
University of Wisconsin
Volume :
4
Issue :
1
fYear :
1987
Firstpage :
42
Lastpage :
51
Abstract :
The article investigates the design of a built-in self-testing RAM as an economical way, in terms of silicon area overhead, to test memories¿more economical than the use of external testers. The design of a BIST static RAM is given, along with design decisions, retrospectives on how design could have used the area even more efficiently, and results of implementation. The extra silicon area used by the BIST hardware for 64K static memories is only five percent; for larger memories, it is less. BIST RAM, then, is a practical alternative, especially since testing can be done even during burn-in without the aid of an expensive external tester.
Keywords :
Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Fabrication; Hardware; Logic testing; Random access memory; Read-write memory; Silicon;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.1987.295113
Filename :
4069932
Link To Document :
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