0.13-μm low-κ-Cu CMOS logic-based technology for 2.1-gb high data rate read-channel

Author

Chyurn Guo, Jyh ; Lien, W.Y. ; Tsai, T.L. ; Chen, S.M. ; Wu, C.M.

Author_Institution

Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan

Volume

51

Issue

5

fYear

2004

fDate

5/1/2004 12:00:00 AM

Firstpage

757

Lastpage

763

Abstract

High-performance analog/digital elements have been successfully fabricated by a 0.13-μm low-κ-Cu logic-based mixed-signal CMOS process in a single chip to enable a 2.1-Gb/s read-channel for hard disk drives that is a record-high data rate supported by fully CMOS solution. The high-performance analog devices demonstrate superior drivability, matching, noise immunity, and reliability by a unique dual-gate oxide module to support the aggressive oxide thickness scaling and maintain promisingly good reliability in all aspects.

Keywords

CMOS memory circuits; integrated circuit reliability; mixed analogue-digital integrated circuits; CMOS logic-based technology; aggressive oxide thickness scaling; drivability; dual-gate oxide; hard disk drives; high data rate read-channel; high-performance analog; high-performance analog/digital elements; logic-based mixed-signal CMOS process; matching; noise immunity; reliability; single chip; 1f noise; CMOS process; CMOS technology; Circuit noise; Digital filters; Hard disks; Integrated circuit technology; Radio frequency; Semiconductor device noise; Time to market; Dual-gate oxide; HPA; high-performance analog; read-channel;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2004.826884

Filename

1303835