Efficient sign identification engines for integers represented in rns extended 3-moduli set {2n - 1, 2n + k, 2n + 1}

Sign detection is a widely used operation, namely in digital fixed-point signal processing, but hard to perform in residue number systems (RNSs). Presented is an effective method for performing RNS sign identification in the comprehensive extended 3-moduli set {2ⁿ- 1, 2^n+k, 2ⁿ + 1}, which covers from the traditional 3-moduli set, for k = 0, up to the set whose binary channel width is 2n (k = n). The proposed method is applied to design an efficient hardware architecture for sign detection that not only takes advantage of the arithmetic units available in the RNS, but also imposes a small overhead, both in terms of cost and performance. Experimental results for a 65 nm CMOS technology show that the proposed architecture supersedes the related state-of-the-art, requiring <; 40% of circuit area, reducing the imposed delay by about 25%, and the power consumption by 30%.