DocumentCode :
1012982
Title :
W-gated trench power MOSFET (WFET)
Author :
Darwish, M. ; Yue, C. ; Lui, K.H. ; Giles, F. ; Chan, B. ; Chen, K.-I. ; Pattanayak, D. ; Chen, Q. ; Terrill, K. ; Owyang, K.
Author_Institution :
Vishay Siliconix, Santa Clara, CA, USA
Volume :
151
Issue :
3
fYear :
2004
fDate :
6/17/2004 12:00:00 AM
Firstpage :
238
Lastpage :
242
Abstract :
A W-shaped-gate power trench MOSFET (WFET) that demonstrates a significant reduction in gate-drain charge Qgd, a low on-resistance and good production process margin is presented. The gate is formed using a thicker oxide, self-aligned to the P-body/N-epi junction at the bottom of the trench. Fabricated 35 V N-channel devices exhibit a rDS(on)*Qgd figure of merit of 12.5 mΩ.nC with VGS=10 V and VDD=15 V. Experimental data of devices fabricated using LOCOS and sub-atmospheric CVD (SACVD) processes to form the thicker oxide layer are reported along with simulation results.
Keywords :
MOS analogue integrated circuits; bipolar transistors; circuit optimisation; semiconductor diodes; 0.25 micron; 20 to 30 V; 4.5 to 5.5 V; N devices; NLDMOS; NPN bipolar devices; PMOS devices; PNP bipolar devices; consumer applications; high voltage diode; isolated diode; smart power technology; wireless applications;
fLanguage :
English
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2409
Type :
jour
DOI :
10.1049/ip-cds:20040445
Filename :
1306925
Link To Document :
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