Title :
A Novel Charge Recycling Design Scheme Based on Adiabatic Charge Pump
Author :
Keung, Ka-Ming ; Manne, Vineela ; Tyagi, Akhilesh
Author_Institution :
Iowa State Univ., Ames
fDate :
7/1/2007 12:00:00 AM
Abstract :
Power consumption has become a critical design criterion for integrated circuits given the growing importance of portable battery-operated devices. A typical CMOS gate driven by power supply (VDD), draws energy equal to CLVDD 2 during every cycle of operation. We propose a new approach to recycle the charge with an adiabatic charge pump that moves the slower adiabatic components away from the critical path of logic. The critical path of the system, and hence the delay, do not change. This is achieved by overlapping the adiabatic charge pump delays with the computing path logic delays. Many embedded high performance applications such as digital signal processing (DSP), which exhibit datapath parallelism, are ideal candidates for this scheme. The proposed method has been implemented in DSP computations. SPICE simulations-based results indicate that the proposed scheme reduces energy consumption in these DSP circuits by as much as 18% (on average 9.94%) with no perceptible loss in performance. The area penalty for these energy savings are in the 1%-2% range, The leakage energy reduction in 45-nm BPTM averages 46%.
Keywords :
CMOS digital integrated circuits; SPICE; circuit simulation; electric charge; integrated circuit design; power consumption; power supply circuits; CMOS gate drive; DSP computations; SPICE simulation; adiabatic charge pump; charge recycling design scheme; critical design criterion; datapath parallelism; digital signal processing; energy consumption reduction; integrated circuits; leakage energy reduction; path logic delays; portable battery-operated devices; power consumption; power supply; Charge pumps; Computational modeling; Delay; Digital signal processing; Energy consumption; Logic; Parallel processing; Power supplies; Recycling; SPICE; Chargepump; charge recycling; low power;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2007.899220