• DocumentCode
    10160
  • Title

    Design, Fabrication and Characterization of Low-Noise and High-Reliability Amorphous Silicon Gate Driver Circuit for Advanced FPD Applications

  • Author

    Chien-Hsueh Chiang ; Yiming Li

  • Author_Institution
    Inst. of Commun. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
  • Volume
    11
  • Issue
    8
  • fYear
    2015
  • fDate
    Aug. 2015
  • Firstpage
    633
  • Lastpage
    639
  • Abstract
    We report a novel design of amorphous silicon gate (ASG) driver circuit with not only low output noises but also improved reliability. The ASG circuits are made of thin-film transistors (TFTs) and integrated in the substrate glass. Unlike the most traditional ASG circuits, the proposed pull-down signals are complementary with lower frequency to discharge the critical nodes in the proposed circuit. The new pull-down signals are created to discharge each two adjacent stage circuits. By inputting two controlled pulse signals, the prospective pull-down signals can be created eventually in the circuit. To simulate the real driving conditions, a string of a resistance (1.24 kΩ) and a capacitance (85.5 pF) are connected to each output as loading. By probing the output pads of the real circuit sample, the output characteristics can practicably be measured. In particular, the output ripples can be suppressed to 0.28 V. Moreover, the measured threshold voltage (Vth) shift with two stressing signals at different frequencies reveals the significant difference. The measured Vth shift after 12 h of the clock stressing with lower frequency (167 Hz) is about 12% slower speed than that of the stressing clock with higher frequency (16.7 kHz) under the high temperature (60 °C).
  • Keywords
    amorphous semiconductors; circuit noise; circuit reliability; driver circuits; flat panel displays; silicon; thin film transistors; ASG driver circuit; TFT; adjacent stage circuit; advanced FPD application; amorphous silicon gate driver circuit; capacitance 85.5 pF; clock stressing; controlled pulse signal; flat panel display; frequency 16.7 kHz; frequency 167 Hz; pull-down signal; resistance 1.24 kohm; substrate glass; temperature 60 C; thin-film transistor; threshold voltage shift; voltage 0.28 V; Clocks; Indium tin oxide; Integrated circuit reliability; Logic gates; Temperature measurement; Thin film transistors; Amorphous silicon gate (ASG) driver circuits; frequency; output noises; output ripples; pull-down signal; reliability; temperature; thin-film transistors (TFTs); threshold voltage shift;
  • fLanguage
    English
  • Journal_Title
    Display Technology, Journal of
  • Publisher
    ieee
  • ISSN
    1551-319X
  • Type

    jour

  • DOI
    10.1109/JDT.2014.2387880
  • Filename
    7005398