Title :
Memory in the fast lane
Author_Institution :
Memory Strategies International, USA
Abstract :
The author describes how the demand for higher-bandwidth memories in systems from multiprocessing to multimedia has designers pulling out all the stops. Topics discussed include: cache hierarchy; rapider RAM; wider data; application specific DRAMs; synchronous memories; and SRAM caches.<>
Keywords :
DRAM chips; SRAM chips; buffer storage; multimedia systems; multiprocessing systems; RAM; SRAM caches; application specific DRAMs; cache hierarchy; high-bandwidth memories; multimedia; multiprocessing; synchronous memories; Bandwidth; Circuit testing; Computer architecture; Costs; DRAM chips; Delay; Microprocessors; Plugs; Random access memory; Read-write memory;
Journal_Title :
Spectrum, IEEE