Systolic implementation of multidimensional nonrecursive digital filters

A systematic method for the mapping of nonrecursive digital filter algorithms onto systolic hardware is presented. In this method, any filter algorithm is first transformed into its corresponding z-domain equivalent. Different structures are obtained by reordering the summations and delays involved in the filter algorithms. The method can be applied to obtain many advantageous structures that can satisfy a set of desirable or preset criteria, such as latency, locality, and modularity. All the multidimensional structures obtained are regular and hierarchical, i.e., the M-dimensional structures are obtained from the (M-1)-dimensional ones, which are in turn obtained from (M-2)-dimensional structures, and so on