• DocumentCode
    1023486
  • Title

    A 0.004-mm ^{2} Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor

  • Author

    Inhwa Jung ; Gunok Jung ; Janghoon Song ; Moo-Young Kim ; Junyoung Park ; Sung Bae Park ; Chulwoo Kim

  • Author_Institution
    Korea Univ., Seoul
  • Volume
    55
  • Issue
    2
  • fYear
    2008
  • Firstpage
    116
  • Lastpage
    120
  • Abstract
    Portable multiphase clock generators capable of adjusting its clock phase according to input clock frequencies have been developed both in a 0.18-mum and in a 0.13-mum CMOS technologies. They consist of a full-digital CMOS circuit design that leads to a simple, robust, and portable IP. In addition, their open-loop architecture lead to no jitter accumulation and one-cycle lock characteristic that enables clock-on-demand circuit structures. The implemented low power clock generator tile in a 0.13-mum CMOS technology occupies only 0.004 mm 2 and operates at variable input frequencies ranging from 625 MHz to 1.2 GHz within a plusmn 2% phase error having one-cycle lock time.
  • Keywords
    CMOS digital integrated circuits; clocks; digital phase locked loops; low-power electronics; microprocessor chips; reduced instruction set computing; CMOS technologies; RISC microprocessor; adjustable clock phase; clock-on-demand circuit structures; frequency 625 MHz to 1.2 GHz; full-digital CMOS circuit; low power clock generator tile; one-cycle lock characteristic; open-loop architecture; portable multiphase clock generator tile; size 0.13 mum; size 0.18 mum; CMOS technology; Clocks; Energy consumption; Frequency; Jitter; Microprocessors; Phase locked loops; Power generation; Reduced instruction set computing; Digital clock generator; fast lock time; low jitter; low power;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2007.910798
  • Filename
    4415039