Title :
Bist structure using multi-input shift register with initial value
Author_Institution :
Technical University of Gliwice, Instytut Elektroniki, Gliwice, Poland
Abstract :
Parallel signature analysers are very useful for compression of test response data for VLSI. In the letter the compression result is obtained from a signature of zeros alone or ones alone from a nonzero initial state, rather than from the traditional method of obtaining a nonzero signature from a zeroed MISR register. An algebraic description of such a signature analysis is given, realised by means of the external exclusive-OR-type MISR.
Keywords :
VLSI; digital integrated circuits; integrated circuit technology; integrated circuit testing; BIST structure; VLSI; built-in self-test; compression of test response data; external exclusive-OR-type MISR; multi-input shift register with initial value; nonzero initial state; parallel signature analysers; signature analysis; signature of all ones; signature of all zeros; signature of zeros alone;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19870343
