• DocumentCode
    1034099
  • Title

    Explicit formulation of delays in CMOS VLSI

  • Author

    Auvergne, D. ; Deschacht, D. ; Robert, M.

  • Author_Institution
    Laboratoire d´Automatique et de Microelectronique de Montpellier USTL, PL Eugene Bataillon, Montpellier, France
  • Volume
    23
  • Issue
    14
  • fYear
    1987
  • Firstpage
    741
  • Lastpage
    742
  • Abstract
    An explicit formulation for the transient response of CMOS inverters is given, including load conditions and driving waveforms. Validation of the initial hypothesis is obtained through SPICE simulations. The results obtained show clear evidence of the influence of structural and parasitic parameters on propagation times, allowing fast optimisation of the data path.
  • Keywords
    CMOS integrated circuits; VLSI; circuit analysis computing; delays; integrated logic circuits; invertors; transient response; CMOS inverters; SPICE simulations; VLSI; data path optimisation; delays; driving waveforms; load conditions; parasitic parameters; propagation times; transient response;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19870525
  • Filename
    4257860
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1034099