A Patterned Dielectric Support Process for High Performance Passive Fabrication

Author

Chen, C.C. ; Chen, Ssu-Ying ; Cheng, Y.T.

Author_Institution

Nat. Chiao Tung Univ., Hsinchu

Volume

18

Issue

2

fYear

2008

Firstpage

82

Lastpage

84

Abstract

This letter presents a micromachining process to effectively reduce substrate loss via a structure of patterned oxide/nitride fins on a silicon substrate with a resistivity of 1 Omega-cm. Experimental results demonstrate that the insertion loss of a coplanar waveguide (CPW) deposited on the structure can be lowered to the value of 4.33 dB/cm at 40 GHz. Meanwhile, an analytical model is developed to predict the characteristics of the CPW.

Keywords

CMOS integrated circuits; coplanar waveguides; dielectric materials; elemental semiconductors; integrated circuit design; micromachining; microwave integrated circuits; passive networks; silicon; CMOS-based RFIC design; CPW characteristics; Si; coplanar waveguide deposition; effective dielectric constant; equivalent impedance; frequency 40 GHz; high performance passive fabrication; insertion loss; micromachining process; patterned dielectric support process; patterned oxide-nitride fins; radio frequency integrated circuit; silicon substrate; substrate loss reduction; Coplanar waveguide (CPW); effective dielectric constant; equivalent impedance; oxide/nitride fins; radio frequency integrated circuit (RFIC); substrate loss;

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2007.915030

Filename

4432284