DocumentCode
1036699
Title
Tester architecture for a time-division switch
Author
Jajszczyk, Andrzej ; Tyszer, J.
Author_Institution
Technical University of Poznan, Institute of Electronics & Communications, Poznan, Poland
Volume
23
Issue
20
fYear
1987
Firstpage
1064
Lastpage
1066
Abstract
A tester architecture for time-space switches as well as the appropriate testing method are proposed. This architecture makes it possible to detect all stuck-type faults in a digital switch in a reasonable time.
Keywords
automatic test equipment; electronic equipment testing; fault location; multiplexing equipment; switching systems; time division multiplexing; digital switch; fault detection; stuck-type faults; tester architecture; time-division switch; time-space switches;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19870744
Filename
4258981
Link To Document